Modern-day electronics require multiple patterned layers of electrically or optically active materials, sometimes over a relatively large substrate. Electronics such radio frequency identification (RFID) tags, photovoltaics, optical and chemical sensors all require some level of patterning in their electronic circuitry. Flat panel displays, such as liquid crystal displays or electroluminescent displays (ex. OLED), rely upon accurately patterned sequential layers to form thin film components of the backplane. These components include capacitors, transistors, and power buses. The industry is continually looking for new methods of materials deposition and layer patterning for both performance gains and cost reductions.
Thin film transistors (TFTs) may be viewed as representative of the electronic and manufacturing issues for many thin film components. TFTs are widely used as switching elements in electronics, for example, in active-matrix liquid-crystal displays, smart cards, and a variety of other electronic devices and components thereof. The thin film transistor (TFT) is an example of a field effect transistor (FET). The best-known example of an FET is the MOSFET (Metal-Oxide-Semiconductor-FET), today's conventional switching element for high-speed applications. For applications in which a transistor needs to be applied to a substrate, a thin film transistor is typically used. A critical step in fabricating the thin film transistor involves the deposition of a semiconductor onto the substrate. Presently, most thin film devices are made using vacuum deposited amorphous silicon as the semiconductor, which is patterned using traditional photolithographic methods.
Amorphous silicon as a semiconductor for use in TFTs still has its drawbacks. The deposition of amorphous silicon, during the manufacture of transistors, requires relatively difficult or complicated processes such as plasma enhanced chemical vapor deposition and high temperatures (typically about 360° C.) to achieve the electrical characteristics sufficient for display applications. Such high processing temperatures disallow deposition on substrates made of certain plastics that might otherwise be desirable for use in applications such as flexible displays.
There is a growing interest in depositing thin film semiconductors on plastic or flexible substrates, particularly because these supports would be more mechanically robust, lighter weight, and allow more economic manufacturing, for example, by allowing roll-to-roll processing. A useful example of a flexible substrate is polyethylene terephthalate. Such plastics, however, limit device processing to below 200° C.
In spite of the potential advantages of flexible substrates, there are many issues associated with plastic supports when using traditional photolithography during conventional manufacturing, making it difficult to perform alignments of transistor components across typical substrate widths up to one meter or more. Traditional photolithographic processes and equipment may be seriously impacted by the substrate's maximum process temperature, solvent resistance, dimensional stability, water, and solvent swelling, all key parameters in which plastic supports are typically inferior to glass.
There is interest in utilizing lower cost processes for deposition that do not involve the expense associated with vacuum processing and subtractive patterning processes. In typical vacuum processing, a large metal chamber and sophisticated vacuum pumping systems are required in order to provide the necessary environment. In typical subtractive patterning systems, much of the material deposited in the vacuum chamber is removed, for example in an etch step. These deposition and patterning methods have high capital costs and preclude the easy use of continuous web based systems.
In the past decade, various materials have received attention as a potential alternative to amorphous silicon for use in semiconductor channels of thin film transistors. Semiconductor materials are desirable that are simpler to process, especially those that are capable of being applied to large areas by relatively simple processes. Semiconductor materials that can be deposited at lower temperatures would open up a wider range of substrate materials, including plastics, for flexible electronic devices. Dielectric materials that are easily processable and patternable are also key to the success of low cost and flexible electronic devices.
The discovery of practical inorganic semiconductors as a replacement for current silicon-based technologies has also been the subject of considerable research efforts. For example, metal oxide semiconductors are known that constitute zinc oxide, indium oxide, gallium indium zinc oxide, tin oxide, or cadmium oxide deposited with or without additional doping elements including metals such as aluminum. Such semiconductor materials, which are transparent, can have an additional advantage for certain applications, as discussed below. Additionally, metal oxide dielectrics such as alumina (Al2O3) and TiO2 are useful in practical electronics applications as well as optical applications such as interference filters.
A number of device structures can be made with the functional layers described above. A capacitor results from placing a dielectric between two conductors. A diode results from placing two semiconductors of complementary carrier type between two conducting electrodes. There may also be disposed between the semiconductors of complementary carrier type a semiconductor region that is intrinsic, indicating that that region has low numbers of free charge carriers. A diode may also be constructed by placing a single semiconductor between two conductors, where one of the conductor/semiconductors interfaces produces a Schottky barrier that impedes current flow strongly in one direction. A transistor results from placing upon a conductor (the gate) an insulating layer followed by a semiconducting layer. If two or more additional conductor electrodes (source and drain) are placed spaced apart in contact with the top semiconductor layer, a transistor can be formed. Any of the above devices can be created in various configurations as long as the critical interfaces are created.
There is growing interest in a technology known as selective area deposition, or SAD. As the name implies, selective area deposition involves treating portion(s) of a substrate such that a material is deposited only in those areas that are desired, or selected. For example, Sinha et al. (J. Vac. Sci. Technol. B 24 6 2523-2532 (2006)) have remarked that selective area ALD (Atomic Layer Deposition) requires that designated areas of a surface be masked or “protected” to prevent ALD reactions in those selected areas, thus ensuring that the ALD film nucleates and grows only on the desired unmasked regions. It is also possible to have SAD processes where the selected areas of the surface area are “activated” or surface modified in such a way that the film is deposited only on the activated areas. There are many potential advantages to selective area deposition techniques, such as eliminating an etch process for film patterning, reduction in the number of cleaning steps required, and patterning of materials which are difficult to etch. One approach to combining patterning and depositing the semiconductor is shown in U.S. Pat. No. 7,160,819 entitled “METHOD TO PERFORM SELECTIVE ATOMIC LAYER DEPOSITION OF ZINC OXIDE” by Conley, Jr. et al. Conley, Jr. et al. discuss materials for use in patterning Zinc Oxide on silicon wafers. No information is provided on the use of other substrates, or the results for other metal oxides.
A number of materials have been used by researchers as director inhibitor compounds for selective area deposition. Sinha et al., referenced above, use poly(methyl methacrylate (PMMA) in their masking layer. Conley, Jr. et al. employed acetone and deionized water, along with other process contaminants as deposition inhibitor materials. The problem with these previously used director inhibitors is that they are only effective to direct selected thin materials. Additionally, in order to be useful in constructing devices, director inhibitor compounds need to be patterned. Additive methods of patterning director inhibitors, such as lithography or inkjet are limited in their resolution. Also, there remains a difficulty in aligning the different layers in a final device that cannot be resolved by selective area deposition alone. Therefore, there is a need for a director inhibitor compound that can work with a range of thin film materials, is easily patterned, and is suited to highly accurate patterning in a simple way.